The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2020

Filed:

Dec. 26, 2017
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Chin-Hsun Chen, Taoyuan, TW;

Hao-Yuan Lin, Taipei, TW;

Chia-Hua Chou, Hsinchu County, TW;

Assignee:

MEDIATEK INC., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/46 (2006.01); G05F 1/56 (2006.01); G05F 1/565 (2006.01); G05F 1/569 (2006.01); G05F 1/563 (2006.01); G05F 1/575 (2006.01); G05F 1/573 (2006.01); G05F 1/571 (2006.01);
U.S. Cl.
CPC ...
G05F 1/46 (2013.01); G05F 1/56 (2013.01); G05F 1/462 (2013.01); G05F 1/467 (2013.01); G05F 1/563 (2013.01); G05F 1/565 (2013.01); G05F 1/569 (2013.01); G05F 1/571 (2013.01); G05F 1/573 (2013.01); G05F 1/575 (2013.01);
Abstract

A dynamic current sink includes the following elements. A voltage comparator compares a reference voltage with a second control signal from an LDO (Low Dropout Linear Regulator) to generate a first control signal. A first transistor selectively pulls down a voltage at a first node according to the first control signal. The inverter is coupled between the first node and a second node. An NAND gate has a first input terminal coupled to a second transistor and a third node, a second input terminal coupled to the second node, and an output terminal coupled to a fourth node. A capacitor is coupled between the fourth node and a fifth node. A resistor is coupled between the fifth node and a ground voltage. A third transistor has a control terminal coupled to the fifth node, and selectively draws a discharge current from an output node of the LDO.


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