The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2020

Filed:

Feb. 20, 2018
Applicant:

Analog Value Ltd., Rishon Lezion, IL;

Inventors:

Tiberlu Galambos, Binyamina, IL;

Vladimir Koifman, Rishon Lezion, IL;

Anatoli Mordakhay, Hadera, IL;

Assignee:

ANALOG VALUE LTD., Rishon Lezion, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); H03M 1/10 (2006.01); H03M 1/50 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1245 (2013.01); H03M 1/1009 (2013.01); H03M 1/504 (2013.01); H03M 1/1215 (2013.01);
Abstract

An ADC that includes a processing unit configured to receive from first sampling latches N first PWM pulse start counter values and N first PWM pulse end counter value, receive from second sampling latches, N second PWM pulse start counter values and N second PWM pulse end counter value; (c) select a counter that is coupled to a selected sampling latch; (d) calculate an estimated difference between first and second input analog signals based on at least readings of the selected latch. The readings of the selected counter include a first PWM pulse start counter value latched by the selected latch, a first PWM pulse end counter value latched by the selected latch, a second PWM pulse start counter value latched by the selected latch, and a second PWM pulse end counter value latched by the selected latch; and (e) output a digital output signal indicative of the estimated difference.


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