The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2020

Filed:

Mar. 09, 2018
Applicant:

Tag-connect, Llc, Burlingame, CA (US);

Inventors:

Neil Stanley Sherman, San Bruno, CA (US);

Brian Joseph Eastman, San Jose, CA (US);

Assignee:

TAG-CONNET, LLC, Burlingame, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 12/72 (2011.01); H05K 5/00 (2006.01); H01R 13/627 (2006.01); H01R 13/50 (2006.01); H01R 12/71 (2011.01); H05K 7/10 (2006.01);
U.S. Cl.
CPC ...
H01R 12/721 (2013.01); H01R 12/714 (2013.01); H01R 13/50 (2013.01); H01R 13/6273 (2013.01); H05K 5/0069 (2013.01); H05K 7/1069 (2013.01);
Abstract

Described herein are devices, systems and methods for accessing devices, such as modules or printed circuit boards (PCBs), for electrical communications. Various connectors described herein utilize a side-edge surface of a device, such as a PCB, for connectivity in order to maximize the surface area on the PCB upon which electronic components can be mounted. Such connectors can be used to temporarily connect to devices (e.g., PCBs) for the purposes of debugging, testing and/or configuring circuitry, firmware and/or software. Each such connector utilizes the side-edge surface of a device along its thickness to provide connectivity, which is useful in many situations, including when the device (e.g., a PCB) is to be soldered as a part onto a larger board at a later point in time, or where multiple PCBs are stacked.


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