The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2020

Filed:

Jan. 09, 2017
Applicant:

The Trustee of Columbia University IN the City of New York, New York, NY (US);

Inventors:

Anandaroop Chakrabarti, New York, NY (US);

Harish Krishnaswamy, New York, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/78 (2006.01); H03M 1/74 (2006.01); H03G 3/00 (2006.01); H04L 27/00 (2006.01); H04L 25/03 (2006.01); H03G 3/30 (2006.01);
U.S. Cl.
CPC ...
H03M 1/66 (2013.01); H03G 3/001 (2013.01); H03M 1/745 (2013.01); H03M 1/78 (2013.01); H04L 27/00 (2013.01); H03G 3/3036 (2013.01); H04L 25/03878 (2013.01);
Abstract

Circuits comprising: digital-to-amplitude converter (DAC), comprising: binary weighted switching transistors (BWSTs), each having gate coupled to amplitude control bit ACB, and wherein the drain of each of the BWSTs are connected together and wherein the source of each of the BWSTs are connected together; transistor Mhaving gate coupled to input signal and first bias voltage BVand source coupled to the drains of the BWSTs; transistor Mhaving gate coupled to BVand source coupled to the drain of M; transistor Mhaving gate coupled to BVand source coupled to the drain of M; transistor having gate coupled to BV, source coupled to the drain of M; and inverter having input coupled to another ACB and having output coupled to the output of the DAC and the drain of M


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