The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2020

Filed:

Oct. 03, 2018
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Nadim Khlat, Cugnaux, FR;

Philippe Gorisse, Brax, FR;

Jeffrey D. Potts, Mocksville, NC (US);

Michael R. Kay, Summerfield, NC (US);

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/32 (2006.01); H03F 1/02 (2006.01); H03F 3/24 (2006.01); H03F 1/18 (2006.01); H03F 1/30 (2006.01); H03F 3/19 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3247 (2013.01); H03F 1/0211 (2013.01); H03F 1/18 (2013.01); H03F 1/301 (2013.01); H03F 1/3282 (2013.01); H03F 3/19 (2013.01); H03F 3/245 (2013.01); H03F 2200/451 (2013.01);
Abstract

Aspects disclosed in the detailed description include an envelope tracking (ET) amplifier circuit. The ET amplifier circuit includes ET tracker circuitry configured to provide an ET modulated voltage, which tracks an ET modulated target voltage, to an amplifier circuit(s) for amplifying a radio frequency (RF) signal. The ET amplifier circuit also includes fast switcher circuitry that is activated to provide an alternate current (AC) current to the amplifier circuit(s) when the RF signal includes a higher number of resource blocks (RBs). However, the fast switcher circuitry and its associated control circuitry may incur a processing delay that can cause the fast switcher circuitry to lag behind the ET modulated target voltage. As such, the ET amplifier circuit further includes timing adjustment circuitry to help compensate for the processing delay, thus helping to maintain efficiency of the ET tracker circuitry for improved performance of the ET amplifier circuit.


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