The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2020

Filed:

Mar. 05, 2018
Applicant:

Asahi Kasei Microdevices Corporation, Tokyo, JP;

Inventors:

Edson Gomes Camargo, Tokyo, JP;

Toshiaki Fukunaka, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 31/12 (2006.01); H01L 27/14 (2006.01); H01L 27/15 (2006.01); H01L 33/52 (2010.01); H01L 21/48 (2006.01); H01L 31/0236 (2006.01); H01L 33/20 (2010.01); H01L 31/0216 (2014.01);
U.S. Cl.
CPC ...
H01L 31/12 (2013.01); H01L 21/4803 (2013.01); H01L 21/4846 (2013.01); H01L 27/14 (2013.01); H01L 27/15 (2013.01); H01L 31/0216 (2013.01); H01L 31/02366 (2013.01); H01L 33/20 (2013.01); H01L 33/52 (2013.01);
Abstract

PROBLEM TO BE SOLVED: To reduce an influence on an optical device caused by stress variation on a resin sealing body due to an environmental change and similar change. SOLUTION: An optical device includes a substrate, a semiconductor lamination portion formed on the substrateand configured to receive or emit a light, a protective layerthat has a shape to cover an entire surface of the semiconductor lamination portion, a mold resinconfigured to seal the protective layerand the substrateexcluding a surface of the substrateon an opposite side of a surface on which the semiconductor lamination portion is formed. The light is entered or emitted from a side of the substrate, and the mold resinincludes a through holeconfigured to pass through from a top surface of the mold resinto the protective layer. A deformation of the mold resinis reduced by the protective layerand the through hole. Then, stress variation acting on an active portionincluding the semiconductor lamination portion can be reduced.


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