The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2020

Filed:

Sep. 20, 2018
Applicant:

Sumitomo Electric Industries, Ltd., Osaka, JP;

Inventors:

Tomohiro Yoshida, Osaka, JP;

Hiroyuki Ichikawa, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/283 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 21/283 (2013.01); H01L 21/0254 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 29/42316 (2013.01); H01L 29/66462 (2013.01); H01L 21/0217 (2013.01); H01L 21/02274 (2013.01); H01L 29/2003 (2013.01);
Abstract

A process of forming a gate electrode in an electrode device is disclosed. The process includes steps of, depositing an insulating film on a nitride semiconductor layer; forming a photoresist with an opening corresponding to the gate electrode on the insulating film; forming a recess in the insulating film using the photoresist as an etching mask, the recess leaving a rest portion in the insulating film; exposing the photoresist in oxygen plasma; baking the photoresist to make an edge of the opening thereof dull; etching the rest portion of the insulating film using the dulled photoresist as an etching mask; and forming the gate electrode so as to be in contact with the semiconductor layer through the opening in the insulating film.


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