Memory system for access concentration decrease management and access concentration decrease method

Abstract

A memory cell array may include a normal cell array and a spare cell array, the normal cell array having a plurality of normal memory cells connected to normal lines and the spare memory cell array having a plurality of spare memory cells connected to spare lines configured to replace a failed normal memory cell with a spare memory cell. A spare line address encoding circuit may be configured to generate a spare line address which encodes spare line enable signals being applied when a spare line replacing a normal line is activated to indicate a physical location of the spare line being activated. A spare line adjacent address generator may be configured to generate spare line adjacent address based on the spare line address, and to activate spare lines physically adjacent to the activated spare line.