The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2020

Filed:

Jul. 13, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Seungjun Shin, Incheon, KR;

Tae Young Oh, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/06 (2006.01); G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 7/18 (2006.01); G11C 8/08 (2006.01); G11C 8/10 (2006.01); G11C 8/14 (2006.01); G11C 29/00 (2006.01); G11C 29/02 (2006.01); G11C 7/20 (2006.01); G11C 7/04 (2006.01);
U.S. Cl.
CPC ...
G11C 7/22 (2013.01); G11C 7/06 (2013.01); G11C 7/1051 (2013.01); G11C 7/1057 (2013.01); G11C 7/1084 (2013.01); G11C 7/12 (2013.01); G11C 7/18 (2013.01); G11C 8/08 (2013.01); G11C 8/10 (2013.01); G11C 8/14 (2013.01); G11C 29/00 (2013.01); G11C 29/025 (2013.01); G11C 29/028 (2013.01); G11C 7/04 (2013.01); G11C 7/20 (2013.01);
Abstract

An exemplary embodiment includes a method of controlling a semiconductor device. The semiconductor device includes a memory cell array including a plurality of memory cells connected between a plurality of word lines and a plurality of bit lines, a row decoder for receiving a row address and selecting a word line corresponding to the row address, a column decoder for receiving a column address and selecting a bit line corresponding to the column address, a sense amplifier for reading data stored in a memory cell connected to the selected word line and the selected bit line, and a data output driver. The method includes setting a calibration code for a driver control code, to control an initial current strength of the data output driver, and changing the calibration code to change the driver control code during a read or write operation for the memory cell array.


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