The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2020
Filed:
Nov. 04, 2015
International Business Machines Corporation, Armonk, NY (US);
Chia-yu Chen, White Plains, NY (US);
Kailash Gopalakrishnan, San Jose, CA (US);
Jinwook Oh, Edgewater, NJ (US);
Lee M. Saltzman, Troy, NY (US);
Sunil K. Shukla, Dobbs Ferry, NY (US);
Vijayalakshmi Srinivasan, New York, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An apparatus and method for supporting simultaneous multiple iterations (SMI) and iteration level commits (ILC) in a course grained reconfigurable architecture (CGRA). The apparatus includes: Hardware structures that connect all of multiple processing engines (PEs) to a load-store unit (LSU) configured to keep track of which compiled program code iterations have completed, which ones are in flight and which are yet to begin, and a control unit including hardware structures that are used to maintain synchronization and initiate and terminate loops within the PEs. The PEs, LSU and control unit are configured to commit instructions, and save and restore context at loop iteration boundaries. In doing so, the apparatus tracks and buffers state of in-flight iterations, and detects conditions that prevent an iteration from completing. In support of ILC functions, the LSU is iteration aware and includes: iteration-interleaved load-store queue (LSQ) banks; a Bloom Filter for filtering instructions; and a load coalescing buffer.