The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2019

Filed:

Jul. 17, 2018
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Youngbin Woo, Paju-si, KR;

Youngsun Jang, Daegu, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); G09G 3/3291 (2016.01); G09G 3/3258 (2016.01); G09G 3/3266 (2016.01); H01L 29/786 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3276 (2013.01); G09G 3/3258 (2013.01); G09G 3/3266 (2013.01); G09G 3/3291 (2013.01); H01L 27/323 (2013.01); H01L 27/3262 (2013.01); H01L 27/3265 (2013.01); H01L 29/41733 (2013.01); H01L 29/78672 (2013.01); G09G 2300/0809 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0295 (2013.01); G09G 2320/045 (2013.01); G09G 2330/021 (2013.01);
Abstract

A gate driver circuit, a display device, and a method of driving the display device are disclosed. The gate driver circuit includes a first transistor supplying a start signal to a Q node in response to a clock, a second transistor adjusting a gate voltage of the first transistor in response to the clock, a third transistor adjusting a gate voltage of the second transistor in response to the start signal, a fourth transistor changing a voltage of a QB node, a fifth transistor switching a current path between the first transistor and the Q node in response to a first line control signal, a sixth transistor supplying a gate-off voltage to an output node, a seventh transistor supplying a gate-on voltage to the output node, and an eighth transistor supplying a second line control signal to the QB node.


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