The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2019

Filed:

Dec. 23, 2016
Applicant:

Ati Technologies Ulc, Markham, CA;

Inventor:

Gongxian Jeffrey Cheng, Markham, CA;

Assignee:

ATI Technologies ULC, Markham, Ontario, CA;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 12/0802 (2016.01); G06F 13/16 (2006.01); G06F 13/42 (2006.01); G06F 12/0804 (2016.01); G06F 12/0868 (2016.01);
U.S. Cl.
CPC ...
G06F 13/4022 (2013.01); G06F 12/0802 (2013.01); G06F 12/0804 (2013.01); G06F 12/0868 (2013.01); G06F 13/16 (2013.01); G06F 13/4282 (2013.01); G06F 2212/222 (2013.01); G06F 2212/60 (2013.01); G06F 2212/601 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Described herein is a method and system for accessing a block addressable input/output (I/O) device, such as a non-volatile memory (NVM), as byte addressable memory. A front end processor connected to a Peripheral Component Interconnect Express (PCIe) switch performs as a front end interface to the block addressable I/O device to emulate byte addressability. A PCIe device, such as a graphics processing unit (GPU), can directly access the necessary bytes via the front end processor from the block addressable I/O device. The PCIe compatible devices can access data from the block I/O devices without having to go through system memory and a host processor. In an implementation, a system can include block addressable I/O, byte addressable I/O and hybrids thereof which support direct access to byte addressable memory by the host processor, GPU and any other PCIe compatible device.


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