The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2019

Filed:

Aug. 27, 2018
Applicant:

Netapp, Inc., Sunnyvale, CA (US);

Inventors:

Mahmoud K Jibbe, Wichita, KS (US);

Keith Holt, Wichita, KS (US);

Scott Terrill, Wichita, KS (US);

Assignee:

NETAPP, INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/0802 (2016.01); G11B 5/012 (2006.01); G06F 12/10 (2016.01); G11B 20/10 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0802 (2013.01); G06F 12/10 (2013.01); G11B 5/012 (2013.01); G11B 20/10527 (2013.01); G06F 3/067 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/202 (2013.01); G06F 2212/604 (2013.01); G11B 2020/10657 (2013.01); G11B 2020/10675 (2013.01);
Abstract

A system and method for improving the management of data input and output (I/O) operations for Shingled Magnetic Recording (SMR) devices in a network storage system is disclosed. The storage system includes a storage controller that receives a series of write requests for data blocks to be written to non-sequential addresses within a pool of SMR devices. The storage controller writes the data blocks from the series of write requests to a corresponding sequence of data clusters allocated within a first data cache of the storage controller for a thinly provisioned volume of the pool of SMR devices. Upon determining that a current utilization of the first data cache's data storage capacity exceeds a threshold, the sequence of data clusters including the data blocks from the first data cache are transferred to sequential physical addresses within the SMR devices.


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