The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2019
Filed:
Mar. 26, 2018
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Ian Johnson Smith, Rosewell, GB;
Cirrus Logic, Inc., Austin, TX (US);
Abstract
This application relates to transducer apparatus (), especially for MEMS capacitive transducers. The apparatus has a voltage bias generator () for receiving a supply voltage (V) and generating a bias voltage (V) for biasing a capacitive transducer (). A voltage supply path extends between a supply voltage input terminal () and the voltage bias generator (). A programmable trim circuit (), in use, controls the bias voltage generated by the voltage bias generator. A first filter () is configured to applying filtering to the voltage supply path. A programming contact pad () is configured to form an external contact of the transducer apparatus when packaged and is electrically coupled to the programmable trim circuit via a signal path that does not include the first filter.