The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2019

Filed:

Jan. 31, 2019
Applicant:

Illumina, Inc., San Diego, CA (US);

Inventors:

Darren Segale, San Diego, CA (US);

Hai Tran, San Diego, CA (US);

Paul Crivelli, San Diego, CA (US);

Assignee:

ILLUMINA, INC., San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A61J 1/06 (2006.01); H01S 4/00 (2006.01); G01N 35/00 (2006.01); G01N 15/06 (2006.01); G01N 33/00 (2006.01); G01N 33/48 (2006.01); B01L 3/00 (2006.01); B01J 19/00 (2006.01); B01L 9/00 (2006.01);
U.S. Cl.
CPC ...
B01L 3/502715 (2013.01); B01J 19/0046 (2013.01); B01J 2219/0074 (2013.01); B01L 9/527 (2013.01);
Abstract

A circuit with electrical interconnect for external electronic connection and sensor(s) on a die are combined with a laminated manifold to deliver a liquid reagent over an active surface of the sensor(s). The laminated manifold includes fluidic channel(s), an interface between the die and the fluidic channel(s) being sealed. Also disclosed is a method, the method including assembling a laminated manifold including fluidic channel(s), attaching sensor(s) on a die to a circuit, the circuit including an electrical interconnect, and attaching a planarization layer to the circuit, the planarization layer including a cut out for the die. The method further includes placing sealing adhesive at sides of the die, attaching the laminated manifold to the circuit, and sealing an interface between the die and fluidic channel(s).


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