The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Oct. 14, 2016
Applicants:

Supergrid Institute, Villeurbanne, FR;

Institut Polytechnique DE Grenoble, Grenoble, FR;

Université Grenoble Alpes, Saint Martin D'heres, FR;

Inventors:

William Leon Garcia, Lyons, FR;

Alberto Bertinato, Lyons, FR;

Pascal Tixador, Lyons, FR;

Bertrand Raison, Lyons, FR;

Bruno Luscan, Lyons, FR;

Assignees:

SUPERGRID INSTITUTE, Villeurbanne, FR;

INSTITUT POLYTECHNIQUE DE GRENOBLE, Grenoble, FR;

UNIVERSITE GRENOBLE ALPES, Saint Martin D'heres, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 7/26 (2006.01); H02H 7/28 (2006.01); H02J 3/36 (2006.01); G01R 19/165 (2006.01); H02H 9/02 (2006.01); H01H 33/59 (2006.01);
U.S. Cl.
CPC ...
H02H 7/268 (2013.01); G01R 19/16528 (2013.01); H02H 7/28 (2013.01); H02H 9/023 (2013.01); H02J 3/36 (2013.01); H01H 33/596 (2013.01); Y02E 40/60 (2013.01); Y02E 60/60 (2013.01);
Abstract

An item of interconnection equipment for a high-voltage DC grid includes first and second terminals for connection to first and second lines of a high-voltage DC grid, a third terminal for connection to a local station or a line of the high-voltage grid, a node connected to the first to third terminals, a first superconductor current limiter and a first controlled switch connected in series between the first terminal and the node, a second superconductor current limiter and a second controlled switch connected in series between the second terminal and the node, a third superconductor current limiter and a third controlled switch connected in series between the third terminal and the node, and a current injector configured to inject an electrical current into the node.


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