The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Sep. 20, 2018
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventor:

Tadashi Iguchi, Yokkaichi Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 27/249 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/16 (2013.01);
Abstract

A memory device according to an embodiment includes: a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer parallel to a first direction and a second direction perpendicular to the first direction, and stacked in a third direction perpendicular to the first direction; a first, electrode connected to the first conductive layer; a second electrode connected to the second conductive layer; a third electrode connected to the third conductive layer; and a fourth electrode connected to the fourth conductive layer. The third conductive layer and the fourth conductive layer are not provided between the first electrode and the second electrode. The fourth conductive layer is not provided between the second electrode and the third electrode. A region without the second conductive layer is provided between the second electrode and the third electrode.


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