The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Oct. 18, 2017
Applicant:

Wuhan China Star Optoelectronics Technology Co., Ltd., Wuhan, Hubei, CN;

Inventor:

Jiawei Zhang, Hubei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/66 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); H01L 27/1274 (2013.01); H01L 29/42384 (2013.01); H01L 29/4908 (2013.01); H01L 29/66757 (2013.01); H01L 29/78675 (2013.01);
Abstract

A display panel, a display device and a method for preparing a low-temperature polysilicon thin film transistor are provided. The method includes: providing a base substrate; forming a semiconducting layer on the base substrate; forming a first insulating layer on the semiconducting layer; forming a first metal layer on the first insulating layer and pattering the first metal layer to obtain a first metal gate layer; forming a second insulating layer on the first metal layer; forming a second metal layer on the second insulating layer and patterning the second metal layer to obtain a second metal gate layer; forming a third insulating layer on the second metal layer; forming a third metal layer on the third insulating layer and patterning the third metal layer to form a source and a drain. The LTPS technology can be applied to the production of large-size panels by adopting the present disclosure.


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Zhang, Jiawei. (2019). Display panel, display device and method for preparing a low-temperature polysilicon thin film transistor (U.S. Patent No. 10515984). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10515984

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