The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Nov. 05, 2018
Applicant:

Barefoot Networks, Inc., Santa Clara, CA (US);

Inventors:

Jay E. S. Peterson, San Francisco, CA (US);

Patrick Bosshart, Plano, TX (US);

Michael G. Ferrara, Palo Alto, CA (US);

Assignee:

Barefoot Networks, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); G11C 15/04 (2006.01); G11C 29/00 (2006.01); G11C 29/44 (2006.01); G11C 15/02 (2006.01);
U.S. Cl.
CPC ...
G11C 15/04 (2013.01); G11C 29/44 (2013.01); G11C 29/76 (2013.01); G11C 29/816 (2013.01); G11C 15/02 (2013.01);
Abstract

A hardware forwarding element is provided that includes a group of unit memories, a set of packet processing pipelines, and an error signal fabric. Each packet processing pipeline includes several of match action stages. Each match action stage includes a set of match action tables stored in a set of unit memories. Each unit memory is configured to detect an error in the unit memory and generate an error output when an error is detected in the memory unit. The error signal fabric, for each match action stage, combines error outputs of the unit memories storing match tables into a first bit in the error signal fabric. The error signal fabric, for each match action stage, combines error outputs of the unit memories storing action tables into a second bit in the error signal fabric.


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