The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Jun. 12, 2015
Applicant:

United Technologies Corporation, Farmington, CT (US);

Inventors:

Yiqing Lin, Glastonbury, CT (US);

Stella M. Oggianu, West Hartford, CT (US);

Assignee:

United Technologies Corporation, Farmington, CT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05D 3/12 (2006.01); G05D 5/00 (2006.01); G05D 17/00 (2006.01); G05D 9/00 (2006.01); G05D 11/00 (2006.01); G05B 13/02 (2006.01); H02J 3/38 (2006.01); H02J 13/00 (2006.01); G06F 1/30 (2006.01); G06Q 50/06 (2012.01); H02J 3/06 (2006.01); H02J 3/00 (2006.01);
U.S. Cl.
CPC ...
G05B 13/021 (2013.01); G06F 1/30 (2013.01); G06Q 50/06 (2013.01); H02J 3/06 (2013.01); H02J 3/381 (2013.01); H02J 13/0006 (2013.01); H02J 2003/003 (2013.01); Y02E 40/72 (2013.01); Y04S 10/12 (2013.01);
Abstract

A microgrid controller includes a database in communication with a processor. The processor is operable to receive at least one microgrid input, to determine a first plurality of optimal power characteristic levels at a corresponding one of a plurality of first time intervals for a first time period, and to determine a second plurality of optimal power characteristic levels of a device determined at a corresponding one of a plurality of second time intervals for a second time period. The first time intervals are found at a first frequency different than a second frequency of the second time intervals. One of the second plurality of optimal power characteristic level corresponds to one of the first plurality of optimal power characteristic levels at each first time interval. The processor is configured to control a device optimal power characteristic level in response to the second plurality of optimal power characteristic levels.


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