The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Mar. 13, 2018
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Kazushige Kawasaki, Yokohama, JP;

Yoichiro Kurita, Minato, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); G11C 11/34 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); G11C 11/34 (2013.01); H01L 21/78 (2013.01); H01L 24/81 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/48221 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06555 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01);
Abstract

A semiconductor device includes a base member having a first surface and a second surface on a side opposite to the first surface, the base member including at least one interconnect extending in a first direction along the first surface; two or more stacked bodies arranged in the first direction on the first surface, each of the two or more stacked bodies including semiconductor chips stacked in a second direction perpendicular to the first surface; and logic chips electrically connected respectively to the stacked bodies. Each of semiconductor chips includes first and second semiconductor layers. The first and second semiconductor layers each have an element surface and a back surface. An active element is provided on the element surface. The first semiconductor layer and the second semiconductor layer are bonded such that the element surface of the second semiconductor layer faces the element surface of the first semiconductor layer.


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