The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Jul. 25, 2017
Applicant:

Smart Modular Technologies, Inc., Newark, CA (US);

Inventor:

Jinying Shen, San Ramon, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/56 (2006.01); G06F 11/22 (2006.01); G06F 11/263 (2006.01); G06F 12/16 (2006.01); G11C 5/04 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 29/56016 (2013.01); G06F 3/0614 (2013.01); G06F 11/2205 (2013.01); G06F 11/263 (2013.01); G06F 12/16 (2013.01); G11C 5/04 (2013.01);
Abstract

Approaches, techniques, and mechanisms are disclosed for a test adapter designed to improve testability of non-volatile dual in-line memory modules (NVDIMM) on automatic test equipment (ATE) testers or in-system boards, which have inadequate power supplies. An NVDIMM includes both volatile memories and non-volatile memories. A test adapter is designed to supply increased power to an NVDIMM. A test adapter is implemented using an interposer or a printed circuit board (PCB) that may be inserted into a socket on an ATE tester or on an end-user system-level board. The interposer or PCB includes a power socket for attaching a power cable to supply the external power supply to the NVDIMM. A power on/off sequence is controlled by an ATE tester to simulate or test a system power on/off sequence. An external input power is always on, but both serial and backup power signals are only on during tests of an NVDIMM.


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