The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2019
Filed:
Jul. 10, 2018
Applicant:
Cisco Technology, Inc., San Jose, CA (US);
Inventors:
Guillaume Gottardi, Malakoff, FR;
William Mark Townsley, Paris, FR;
Eric Philippe Hamel, Paris, FR;
Yoann Desmouceaux, Paris, FR;
Pierre Pfister, Chalons-en-Champagne, FR;
Assignee:
Cisco Technology, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04W 4/14 (2009.01); H04W 28/08 (2009.01); H04L 29/08 (2006.01); H04L 29/12 (2006.01);
U.S. Cl.
CPC ...
H04W 28/08 (2013.01); H04L 61/2007 (2013.01); H04L 67/141 (2013.01);
Abstract
A user plane selection mechanism is provided that leverages an in-band load balancing scheme, e.g., Segment Routing Load Balancing (SRLB). Information in the form of segment identifiers (complemented by metadata) is passed to the components. As a result, the effective user plane function selection can be done in-band at the transport level.