The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2019

Filed:

Feb. 19, 2019
Applicant:

University of Connecticut, Farmington, CT (US);

Inventors:

Peng Zhang, Storrs Mansfield, CT (US);

Bing Wang, Storrs Mansfield, CT (US);

Peter B. Luh, Storrs Mansfield, CT (US);

Lingyu Ren, Storrs Mansfield, CT (US);

Yanyuan Qin, Storrs Mansfield, CT (US);

Assignee:

University of Connecticut, Farmington, CT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/825 (2013.01); H04L 12/891 (2013.01); H04L 12/851 (2013.01); H04L 12/727 (2013.01); H04L 12/715 (2013.01); H04L 12/703 (2013.01); H04L 12/717 (2013.01); H02J 13/00 (2006.01); H04L 12/26 (2006.01);
U.S. Cl.
CPC ...
H04L 47/25 (2013.01); H02J 13/0086 (2013.01); H04L 45/121 (2013.01); H04L 45/28 (2013.01); H04L 45/42 (2013.01); H04L 45/64 (2013.01); H04L 47/24 (2013.01); H04L 47/41 (2013.01); H04L 43/08 (2013.01); Y04S 40/168 (2013.01);
Abstract

Systems and methods for integrating ultra-fast programmable networks in microgrid are disclosed to provide flexible and easy-to-manage communication solutions, thus enabling resilient microgrid operations in face of various cyber and physical disturbances. The system is configured to establish a novel software-defined networking (SDN) based communication architecture which abstracts the network infrastructure from the upper-level applications to significantly expedite the development of microgrid applications, develop three functions of the SDN controller for microgrid emergency operations, including time delay guarantee, failover reconfiguration and rate limit and create a hardware-in-the-loop cyber-physical platform for evaluating and validating the performance of the presented architecture and control techniques.


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