The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2019
Filed:
May. 15, 2019
Perceptia Ip Pty Ltd, Kurraba Point, AU;
Julian Jenkins, Kurraba Point, AU;
Perceptia IP Pty Ltd, Kurraba Point, NSW, AU;
Abstract
A PLL has a controlled oscillator with a limited frequency range. It has a phase accumulator and a phase predictor whose ranges are limited to a value K related to their bit width. K is less than the ratio of the maximum output frequency and the minimum reference frequency. The PLL locks the output frequency to a value higher than the FCW times the reference frequency. The PLL includes a means for setting the output frequency to a target frequency before achieving final lock. The PLL may have a lock detector. After acquiring lock, the PLL may reduce the bit width and K value, for example by cutting power to or switching off some of the bits, or by switching off slow counters in a multi-counter system.