The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2019
Filed:
May. 15, 2019
Perceptia Ip Pty Ltd, Kurraba Point, AU;
Julian Jenkins, Kurraba Point, AU;
Perceptia IP Pty Ltd, Kurraba Point, NSW, AU;
Abstract
A PLL includes a controlled oscillator, a phase accumulator to measure the controlled oscillator output phase, a phase predictor to calculate the required output phase, and a phase subtractor to calculate the phase difference or phase error. The phase accumulator includes a fast counter and a low-power counter, and two sets of corresponding latches. The fast counter counts cycles of the controlled oscillator clock signal, and the low-power counter counts carry signals from the fast counter. The low-power counter represents one or more most significant bits of the integer part of the measured phase, and the fast counter represents the remaining bits. The phase accumulator may further include a delay line, second latches, and a delay line decoder to measure a fractional part of the phase. A calibration feedback loop may keep the number of delay line steps per output clock pulse known and stable.