The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2019
Filed:
Oct. 31, 2017
Applicant:
Cisco Technology, Inc., San Jose, CA (US);
Inventors:
Kadaba Lakshmikumar, Basking Ridge, NJ (US);
Alexander Christopher Kurylak, Bethlehem, PA (US);
Manohar Nagaraju, East Norriton, PA (US);
Richard Van Hoesen Booth, Riegelsville, PA (US);
Assignee:
Cisco Technology, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03G 3/30 (2006.01); H03F 1/02 (2006.01); H03K 3/03 (2006.01); H03F 1/30 (2006.01); G05F 1/46 (2006.01); H03G 1/00 (2006.01); H03L 7/08 (2006.01);
U.S. Cl.
CPC ...
H03G 3/30 (2013.01); G05F 1/46 (2013.01); H03F 1/0233 (2013.01); H03F 1/30 (2013.01); H03G 1/0088 (2013.01); H03K 3/0315 (2013.01); H03F 2200/468 (2013.01); H03F 2200/78 (2013.01); H03F 2203/45288 (2013.01); H03L 7/0807 (2013.01);
Abstract
A circuit includes a front end section configured to receive input current signals; a programmable gain amplifier section coupled to the front end section, the programmable gain amplifier section including a plurality of inverters connected in series without a resistor disposed therebetween; and an output buffer section coupled to the programmable gain amplifier section and configured to output voltage signals.