The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2019

Filed:

May. 17, 2018
Applicant:

Sony Corporation, Tokyo, JP;

Inventor:

Fumiaki Okazaki, Kanagawa, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 21/28 (2006.01); H01L 21/768 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4983 (2013.01); H01L 21/28097 (2013.01); H01L 21/28194 (2013.01); H01L 21/76801 (2013.01); H01L 21/76832 (2013.01); H01L 29/4975 (2013.01); H01L 29/517 (2013.01); H01L 29/6659 (2013.01); H01L 29/66545 (2013.01); H01L 29/78 (2013.01); H01L 29/7833 (2013.01); H01L 29/7843 (2013.01); H01L 29/66772 (2013.01); H01L 2924/0002 (2013.01);
Abstract

An insulated gate field effect transistor with (a) a base having source/drain regions, a channel forming region, a gate insulating film formed on the channel forming region, an insulating layer covering the source/drain regions, and a gate electrode formation opening provided in a partial portion of the insulating layer above the channel forming region; (b) a gate electrode formed by burying a conducive material layer in the gate electrode formation opening; (c) a first interlayer insulating layer formed on the insulating layer and the gate electrode and containing no oxygen atom as a constituent element; and (d) a second interlayer insulating layer on the first interlayer insulating layer.


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