The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2019

Filed:

Jan. 11, 2017
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Display Technology Co., Ltd., Beijing, CN;

Inventors:

Jing Wang, Beijing, CN;

Huibin Guo, Beijing, CN;

Xiangqian Ding, Beijing, CN;

Jinchao Bai, Beijing, CN;

Yao Liu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 27/12 (2006.01); G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G03F 7/038 (2006.01); G03F 7/039 (2006.01); G03F 7/16 (2006.01); G03F 7/20 (2006.01); G03F 7/32 (2006.01); H01L 21/027 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1288 (2013.01); G02F 1/1368 (2013.01); G02F 1/13439 (2013.01); G02F 1/134363 (2013.01); G02F 1/136227 (2013.01); G02F 1/136286 (2013.01); G03F 7/038 (2013.01); G03F 7/039 (2013.01); G03F 7/16 (2013.01); G03F 7/20 (2013.01); G03F 7/32 (2013.01); H01L 21/0274 (2013.01); H01L 27/124 (2013.01); H01L 27/1248 (2013.01); H01L 27/1262 (2013.01); G02F 2001/136236 (2013.01); G02F 2001/136295 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01);
Abstract

An array substrate motherboard, a manufacturing method thereof and a display device are provided. The manufacturing method includes forming a film layer pattern for a first display product at a first region of a base substrate and forming a film layer pattern for a second display product at a second region of the base substrate. The first display product has deep holes at a density larger than the second display product, and each deep hole is a via-hole penetrating through at least two insulation layers. Specifically, the manufacturing method include: prior to forming a second conductive pattern on an insulation layer, reducing a thickness of the insulation layer at the first region; and forming the second conductive pattern on the insulation layer, and enabling the second conductive pattern to be connected to a first conductive pattern under the insulation layer through a via-hole structure penetrating through the insulation layer.


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