The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2019

Filed:

Jul. 24, 2018
Applicant:

Government of the United States, As Represented BY the Secretary of the Air Force, Wright-Patterson AFB, OH (US);

Inventors:

Michael R. Snure, Dayton, OH (US);

Gene P. Siegel, Beavercreek, OH (US);

Qing Paduano, Weymouth, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02502 (2013.01); H01L 21/0242 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02444 (2013.01); H01L 21/02458 (2013.01); H01L 21/02485 (2013.01); H01L 21/02664 (2013.01); H01L 21/7806 (2013.01);
Abstract

A semiconductor device includes a mechanical release layer, such as a van der Waals buffer layer, with a predetermined material roughness and thickness adjacent to a first substrate; a nucleation layer adjacent to the mechanical release layer; and a first semiconductor layer attached to the nucleation layer. The first semiconductor layer, the nucleation layer, and a portion of the mechanical release layer are releasably connected to the first substrate. The predetermined material roughness and thickness of the mechanical release layer determines a bonding strength of the first semiconductor layer to the first substrate. The semiconductor device may include an aluminum nitride insert layer adjacent to the first semiconductor layer; an aluminum gallium nitride barrier layer adjacent to the aluminum nitride insert layer; and a second semiconductor layer adjacent to the aluminum gallium nitride barrier layer. The semiconductor device may include a second substrate attached to the released first semiconductor layer.


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