The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2019

Filed:

Sep. 20, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Farrukh Hijaz, San Diego, CA (US);

George Patsilaras, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/0897 (2016.01); G06F 12/0877 (2016.01); G06F 12/0891 (2016.01); G06F 12/0811 (2016.01); G06F 12/126 (2016.01); G06F 12/128 (2016.01); G06F 11/34 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0897 (2013.01); G06F 11/34 (2013.01); G06F 12/0811 (2013.01); G06F 12/0877 (2013.01); G06F 12/0891 (2013.01); G06F 12/126 (2013.01); G06F 12/128 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/1028 (2013.01); G06F 2212/60 (2013.01);
Abstract

Various aspects include methods for implementing retaining high locality data in a higher level cache memory on a computing device. Various aspects may include receiving a cache access request for a first cache line in the higher level cache memory indicating a locality of the first cache line, determining whether the access request indicates high locality, and setting a high locality indicator of the first cache line in response to determining that the cache access request indicates high locality. Various aspects may include determining whether a lower level cache memory hit counter of a first cache line of a first cache exceeds a lower level cache locality threshold, setting a high locality indicator of the first cache line in response to determining that the lower level cache memory hit counter exceeds the lower level cache locality threshold and resetting the lower level cache memory hit counter of the first cache.


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