The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2019

Filed:

Jul. 19, 2018
Applicant:

AU Optronics Corporation, Hsin-Chu, TW;

Inventors:

Ju-Chin Chen, Hsin-Chu, TW;

Jui-Ping Yu, Hsin-Chu, TW;

Yu-Chia Huang, Hsin-Chu, TW;

Assignee:

AU OPTRONICS CORPORATION, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/133 (2006.01); G02F 1/1337 (2006.01); G02F 1/1334 (2006.01); G02F 1/1345 (2006.01);
U.S. Cl.
CPC ...
G02F 1/134336 (2013.01); G02F 1/1334 (2013.01); G02F 1/1337 (2013.01); G02F 1/13306 (2013.01); G02F 1/13439 (2013.01); G02F 1/136286 (2013.01); G02F 2001/13456 (2013.01); G02F 2201/123 (2013.01);
Abstract

A display device includes a first substrate, a second substrate, a liquid crystal layer, a plurality of signal lines, a dielectric layer, a plurality of first pixel electrodes, an auxiliary electrode layer, and a control element. The second substrate and the first substrate are oppositely disposed. The liquid crystal layer is disposed between the first substrate and the second substrate. The signal lines are disposed on the first substrate. The dielectric layer is disposed on the signal lines. The first pixel electrodes are disposed on the dielectric layer, are separated from each other, and are electrically connected to one of the signal lines respectively. The auxiliary electrode layer is disposed between the first substrate and the dielectric layer, and the auxiliary electrode layer is at least partially located, in a vertical projection on the first substrate, between two adjacent first pixel electrodes, and at least some of the signal lines overlap with some of the first pixel electrodes in the direction perpendicular to the first substrate. The control element is disposed on the first substrate and is electrically connected to the signal lines and the auxiliary electrode layer.


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