The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Sep. 20, 2018
Applicant:

Marvell International Ltd., Hamilton, BM;

Inventors:

Ramya Krishna Devineni, Fremont, CA (US);

Donald Pannell, Cupertino, CA (US);

Hong Yu Chou, Saratoga, CA (US);

Samuel Kong, Cupertino, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); H04L 7/04 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04J 3/0661 (2013.01); H04J 3/0644 (2013.01); H04L 7/042 (2013.01); H04J 3/0635 (2013.01); H04J 3/0682 (2013.01); H04L 7/0037 (2013.01); H04L 7/04 (2013.01);
Abstract

A network device operative to maintain a first time of day (ToD) synchronized to a grandmaster clock is provided and includes a physical layer (PHY) circuit and a processor. The PHY circuit: maintains the first ToD in a first format and a second ToD in a second format; initially sets the second ToD based on a master ToD of the grandmaster clock; and updates the second ToD to maintain synchrony with a master time of the grandmaster clock by incrementing a counter based on a local clock, periodically updating the first ToD responsively to a counter value of the counter, and based on the updated first ToD and a compensation value, periodically adjusting the second ToD to more closely match the master time. The processor ascertains whether the second ToD has drifted from the master time and adjusts the compensation value based on whether the second ToD has drifted.


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