The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2019
Filed:
Jun. 20, 2017
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Soo Jin Kim, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/15 (2006.01); H03M 13/07 (2006.01); G11C 16/34 (2006.01); G11C 29/04 (2006.01); G11C 29/42 (2006.01); G11C 29/44 (2006.01); G11C 29/52 (2006.01); H03M 13/00 (2006.01); H03M 13/53 (2006.01);
U.S. Cl.
CPC ...
H03M 13/151 (2013.01); G11C 16/3404 (2013.01); G11C 29/04 (2013.01); G11C 29/42 (2013.01); G11C 29/4401 (2013.01); G11C 29/52 (2013.01); H03M 13/07 (2013.01); H03M 13/152 (2013.01); H03M 13/153 (2013.01); H03M 13/1595 (2013.01); H03M 13/6561 (2013.01); G11C 2029/0411 (2013.01);
Abstract
An error correction circuit includes a syndrome calculator suitable for generating syndromes from an 'n'-bit codeword for a single unit of time, an error location polynomial calculator suitable for generating error location polynomial coefficients based on the syndromes provided for the single unit of time, an error location calculator suitable for calculating error locations based on the error location polynomial coefficients for the single unit of time, and an error corrector suitable for correcting errors of the codeword based on the error locations for the single unit of time. The error correction circuit operates in a pipelining manner.