The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Nov. 09, 2018
Applicant:

Jtekt Corporation, Osaka-shi, Osaka, JP;

Inventor:

Hiroshi Sumasu, Kashihara, JP;

Assignee:

JTEKT CORPORATION, Osaka-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02P 7/29 (2016.01); B62K 21/00 (2006.01); H02P 27/08 (2006.01); H02P 21/22 (2016.01); B62D 5/04 (2006.01);
U.S. Cl.
CPC ...
H02P 27/08 (2013.01); H02P 21/22 (2016.02); B62D 5/0409 (2013.01); B62D 5/0463 (2013.01);
Abstract

A common mode noise reduction section performs a first noise reduction process in a first system, a second noise reduction process in a second system and a third noise reduction process in the case where the two systems have a phase, a current for which that flows through a stray capacitance is not canceled out in at least one PWM cycle in a current control cycle after the first noise reduction process is performed and the second noise reduction process is performed. The third noise reduction process includes shifting a PWM count for each phase in the first system by a first predetermined amount and shifting a PWM count for each phase in the second system by a second predetermined amount such that the currents for such a phase which flow through the stray capacitances in the two systems cancel out each other in the relevant PWM cycle.


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