The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Sep. 29, 2014
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;

Inventor:

Qiyu Shen, Beijing, CN;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); H01L 27/12 (2006.01); G02F 1/1335 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1248 (2013.01); G02F 1/133512 (2013.01); G02F 1/134363 (2013.01); G02F 1/136209 (2013.01); H01L 27/124 (2013.01); H01L 27/1255 (2013.01); H01L 27/1259 (2013.01);
Abstract

The present invention discloses an array substrate and a manufacturing method thereof, and a liquid crystal display device, which relate to the field of liquid crystal display technology and may keep patterns at the slit tail ends of slit electrodes consistent with predesigned patterns so as to avoid a trace mura phenomenon. The array substrate includes a plurality of sub-pixel units defined by crossing of a plurality of gate lines and a plurality of data lines, wherein a first electrode is arranged in each sub-pixel unit, the first electrode is a slit electrode, and a common electrode line is arranged below the first electrode. In each sub-pixel unit, a light blocking layer is arranged between the common electrode line and the first electrode, and both the slit tail end of the first electrode and the common electrode line are positioned in the area of the light blocking layer.


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