The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Nov. 09, 2018
Applicant:

SK Hynix Inc., Incheon-si Gyeonggi-do, KR;

Inventors:

Chanho Shin, Icheon-si, KR;

Seunghwan Kim, Icheon-si, KR;

Pil Soon Bae, Icheon-si, KR;

Hwijo Jeong, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/92 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05547 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/17181 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/73104 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/83203 (2013.01); H01L 2224/9211 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06593 (2013.01);
Abstract

A method of stacking semiconductor dies includes attaching a lower semiconductor die to a base substrate with an adhesive layer and attaching an upper semiconductor die to the lower semiconductor die with another adhesive layer. A thermo-compression bonding technique is applied to the upper semiconductor die to cure the adhesive layers and to bond the upper semiconductor die to the lower semiconductor die.


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