The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2019
Filed:
May. 17, 2018
General Electric Company, Schenectady, NY (US);
Saijun Mao, Shanghai, CN;
Bo Qu, Shanghai, CN;
Jingkui Shi, Shanghai, CN;
He Xu, Shanghai, CN;
Jie Shen, Shanghai, CN;
Lin Lan, Shanghai, CN;
Rui Li, Shanghai, CN;
Zhihui Yuan, Shanghai, CN;
Alistair Martin Waddell, Garching bei Munchen, DE;
Stefan Schroeder, Garching bei Munchen, DE;
Marius Michael Mechlinski, Garching bei Munchen, DE;
Mark Aaron Chan, Garching bei Munchen, DE;
General Electric Company, Schenectady, NY (US);
Abstract
The present disclosure relates to an integrated power semiconductor packaging apparatus and a power converter containing the integrated power semiconductor packaging apparatus. The integrated power semiconductor packaging apparatus comprises a plurality of power semiconductor devices and an electrically insulative substrate formed integrally. The electrically insulative substrate comprises a flat surface, at least one separation wall protruding from the flat surface and a flow channel inside the electrically insulative substrate. The at least one separation wall is configured to separate the flat surface into a plurality of flat areas, and each of the plurality of flat areas is configured to receive one of the plurality of power semiconductor devices. The flow channel is configured for allowing a coolant flowing through to remove heat from the plurality of power semiconductor devices.