The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Oct. 02, 2015
Applicant:

Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;

Inventors:

Sachie Tajima, Tokyo, JP;

Masakuni Agetsuma, Tokyo, JP;

Takanobu Suzuki, Tokyo, JP;

Akihiko Araki, Tokyo, JP;

Assignee:

HITACHI, LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 12/06 (2006.01); G06F 13/28 (2006.01); G06F 13/10 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5016 (2013.01); G06F 9/5027 (2013.01); G06F 12/0646 (2013.01); G06F 13/10 (2013.01); G06F 13/28 (2013.01); G06F 2212/1048 (2013.01); G06F 2212/604 (2013.01); G06F 2213/2806 (2013.01);
Abstract

By assigning a physically continuous memory area to a virtual storage apparatus operated on an OS, the performance of the virtual storage apparatus is secured. A processor operates an OS, and the processor executes a plurality of processes on the OS. The plurality of processes includes a first virtual storage apparatus. The first virtual storage apparatus executes an I/O process, and includes a cache for storing data that is subjected to the I/O process. The processor assigns a resource in a computer to the plurality of processes, and the processor creates area information that indicates physical addresses assigned to the processes in a memory. On the basis of the area information, the processor selects a continuous area, which is a physically continuous area from the memory and assigns the continuous area to the cache.


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