The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Mar. 22, 2017
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Yoshiyuki Hiroshima, Nakano, JP;

Akiko Matsui, Meguro, JP;

Mitsuhiko Sugane, Ichikawa, JP;

Takahide Mukoyama, Kamakura, JP;

Tetsuro Yamada, Kawasaki, JP;

Kohei Choraku, Yokohama, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/04 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0271 (2013.01); H05K 3/043 (2013.01); H05K 3/4644 (2013.01); H05K 2201/09381 (2013.01); H05K 2201/09418 (2013.01);
Abstract

A wiring board manufacturing method includes forming a conductor pattern within a waste board section of a wiring board including a product section and the waste board section, the conductor pattern in which a plurality of polygonal lands made of a conductor are arranged along a first direction and a second direction crossing the first direction, each of the plurality of polygonal lands making contact with an adjacent one of the plurality of polygonal lands at each apex of the plurality of polygonal lands; and selectively removing the conductor at the apex of at least part of the plurality of polygonal lands.


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