The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Sep. 29, 2017
Applicant:

Enraytek Optoelectronics Co., Ltd., Shanghai, CN;

Inventors:

Huiwen Xu, Shanghai, CN;

Zhengguo Yu, Shanghai, CN;

Qiming Li, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/38 (2010.01); H01L 33/06 (2010.01); H01L 33/44 (2010.01); H01L 33/40 (2010.01); H01L 33/42 (2010.01); H01L 33/32 (2010.01);
U.S. Cl.
CPC ...
H01L 33/385 (2013.01); H01L 33/06 (2013.01); H01L 33/32 (2013.01); H01L 33/382 (2013.01); H01L 33/405 (2013.01); H01L 33/42 (2013.01); H01L 33/44 (2013.01); H01L 2933/0016 (2013.01);
Abstract

An LED chip comprises: an operation substrate; a first conductive layer disposed on a functional surface of the operation substrate; a die disposed on the first conductive layer, wherein the die comprises a first semiconductor layer and a second semiconductor layer; a first electrode layer electrically connected with the first conductive layer; and a second electrode layer electrically connected with the second semiconductor layer, wherein a first isolation layer is disposed between the second electrode layer and the first conductive layer. In embodiments of the present disclosure, the first electrode layer and the second electrode layer are disposed on the bottom surface of the operation substrate, and are formed after the LED die is formed. Therefore, a dicing process and a packaging process are not required, thus, process steps are simplified and process cost is reduced, which is conducive to achieve 'free packaging' technology.


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