The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Mar. 08, 2018
Applicant:

Toyoda Gosei Co., Ltd., Kiyosu-shi, JP;

Inventors:

Junya Nishii, Kiyosu, JP;

Tohru Oka, Kiyosu, JP;

Nariaki Tanaka, Kiyosu, JP;

Assignee:

TOYODA GOSEI CO., LTD., Kiyosu-Shi, Aichi-Ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/324 (2006.01); H01L 21/225 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/423 (2006.01); H01L 29/778 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/26546 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/2253 (2013.01); H01L 21/266 (2013.01); H01L 21/26586 (2013.01); H01L 21/28264 (2013.01); H01L 21/3245 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/4236 (2013.01); H01L 29/66462 (2013.01); H01L 29/7788 (2013.01);
Abstract

A method for manufacturing a semiconductor device comprises: a stacking process that stacks a p-type semiconductor layer of Group III nitride containing a p-type impurity on a first n-type semiconductor layer of Group III nitride containing an n-type impurity; a p-type ion implantation process that ion-implants the p-type impurity into the p-type semiconductor layer; and a heat treatment process that performs heat treatment to activate the ion-implanted p-type impurity. The p-type ion implantation process and the heat treatment process are performed such that the p-type impurity of the p-type semiconductor layer is diffused into the n-type semiconductor layer to form a first p-type impurity containing region in at least part of the first n-type semiconductor layer and below a region of the p-type semiconductor layer into which the ion implantation has been performed.


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