The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2019
Filed:
Jun. 29, 2017
Sharp Kabushiki Kaisha, Sakai, Osaka, JP;
Tokuo Yoshida, Sakai, JP;
Takuya Watanabe, Sakai, JP;
Akira Tagawa, Sakai, JP;
Yasuaki Iwase, Sakai, JP;
Yohei Takeuchi, Sakai, JP;
SHARP KABUSHIKI KAISHA, Sakai, Osaka, JP;
Abstract
A TFT circuit () includes a first node (N) to which a first low potential (Vc) is supplied, a depression-type first TFT () which is arranged between the first node (N) and low-potential wiring () for supplying a second low potential (Va) higher than the first low potential (Vc), and in which a drain terminal is connected to the first node, and a depression-type second TFT () which is arranged between the first TFT () and the low potential wiring () and in which a source terminal is connected to a source terminal of the first TFT, in which the first low potential (Vc) is supplied to a gate terminal of the second TFT, a second node (N) enterable a floating state is formed between the source terminal of the first TFT and the source terminal of the second TFT, and the second node (N) is connected to a sub-circuit (SC) which is settable a potential of the second node (N) to be lower than the second low potential (Va) and higher than the first low potential (Vc).