The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2019
Filed:
Aug. 06, 2018
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Sankaran Nampoothiri, Bangalore, IN;
Subodh Singh, Bangalore, IN;
ShankarGanesh Kandasamy, Bangalore, IN;
Avinash Philip, Bangalore, IN;
Assignee:
Qualcomm Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/0871 (2016.01); G06K 9/62 (2006.01); G06F 11/10 (2006.01); G06F 12/0868 (2016.01); G06F 12/0862 (2016.01); G06F 12/0846 (2016.01); G06F 12/0817 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0871 (2013.01); G06F 11/1064 (2013.01); G06F 12/0862 (2013.01); G06F 12/0868 (2013.01); G06K 9/6201 (2013.01); G06F 12/082 (2013.01); G06F 12/0846 (2013.01);
Abstract
Certain aspects of the present disclosure provide techniques for increasing processor caching efficiency by cache data pattern optimization. One embodiment includes a method for managing data in a cache, including: receiving data to be cached at the cache; determining that the data to be cached matches a predefined data pattern; and updating a tag RAM associated with the cache with a pattern tag comprising tag bits and pattern bits, wherein the pattern bits match the predefined data pattern.