The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2019
Filed:
Nov. 29, 2017
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Raju Siddappa Udava, Bangalore, IN;
Balaji Somu Kandaswamy, Bangalore, IN;
Patana Bhagwan Reddy, Bangalore, IN;
Tushar Vrind, Bangalore, IN;
Venkata Raju Indukuri, Bangalore, IN;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
The various embodiments of the present invention disclose a method for reducing interrupt latency in embedded systems. According to at least one example embodiment of the inventive concepts, the method for reducing interrupt latency in embedded systems, the method comprises steps of toggling, by a processor, from a supervisor (SVC) mode to an interrupt request (IRQ) mode on receiving an interrupt, identifying, by the processor, a Task Control Block (TCB) of a preempted task on receiving the interrupt, enabling, by the processor, the IRQ stack as a pseudo preempted task context table, and storing the preempted task context information in the IRQ stack, wherein a register set is stored in IRQ stack before processing the received interrupt.