The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Dec. 15, 2016
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sung Jun Song, Hwaseong-si, KR;

Young Min Kim, Suwon-si, KR;

Chang Su Kim, Hwaseong-si, KR;

Han Gu Kim, Seongnam-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01); G01R 1/04 (2006.01);
U.S. Cl.
CPC ...
G01R 31/002 (2013.01); G01R 1/0416 (2013.01);
Abstract

A test board for a semiconductor device and a test board including the same are provided. A test board includes a substrate, a mounting pad which is formed on the substrate and on which a semiconductor chip is mounted and a test terminal group arranged on the substrate to be spaced apart from the mounting pad and electrically connected to the semiconductor chip by a pattern arranged on the substrate, wherein the semiconductor chip includes a first terminal and a second terminal for inputting/outputting signals, the test terminal group includes a first test terminal electrically connected to the first terminal and a second test terminal electrically connected to the second terminal, a first voltage is applied to the first terminal and the second terminal, and a stress signal that is caused by a second voltage is applied to the first test terminal.


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