The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2019
Filed:
Sep. 02, 2016
Nanyang Technological University, Singapore, SG;
Massachusetts Institute of Technology, Cambridge, MA (US);
Kwang Hong Lee, Singapore, SG;
Chuan Seng Tan, Singapore, SG;
Eugene A. Fitzgerald, Cambridge, MA (US);
Shuyu Bao, Singapore, SG;
Nanyang Technological University, , SG;
Massachusetts Institute of Technology, Cambridge, MA (US);
Abstract
A method of manufacturing a substrate with reduced threading dislocation density is disclosed, which comprises: (i) at a first temperature, forming a first layer of wafer material on a semiconductor substrate, the first layer arranged to be doped with a first concentration of at least one dopant that is different to the wafer material; and (ii) at a second temperature higher than the first temperature, forming a second layer of the wafer material on the first layer to obtain the substrate, the second layer arranged to be doped with a progressively decreasing concentration of the dopant during formation, the doping configured to be decreased from the first concentration to a second concentration. The wafer material and dopant are different to silicon. A related substrate is also disclosed.