The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2019

Filed:

Jul. 26, 2018
Applicant:

Fuji Electric Co., Ltd., Kawasaki, JP;

Inventor:

Taichi Karino, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/808 (2006.01); H01L 29/08 (2006.01); H02M 3/335 (2006.01); H01L 29/10 (2006.01); H01L 49/02 (2006.01); H02M 1/36 (2007.01); H01L 29/40 (2006.01); H01L 27/02 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0615 (2013.01); H01L 27/0248 (2013.01); H01L 28/20 (2013.01); H01L 29/0696 (2013.01); H01L 29/0865 (2013.01); H01L 29/0882 (2013.01); H01L 29/1066 (2013.01); H01L 29/1095 (2013.01); H01L 29/405 (2013.01); H01L 29/808 (2013.01); H02M 1/36 (2013.01); H02M 3/33523 (2013.01); H01L 29/0619 (2013.01); H02M 2001/0006 (2013.01);
Abstract

A semiconductor device includes a p-type semiconductor substrate; an n-type drift layer on the substrate; an n-type drain region in contact with the drift layer to be provided on the semiconductor substrate at a center of the drift layer; a p-type gate region on the substrate in an outer side of the drift layer, the gate region including U-shaped first and second concave patterns in a planar pattern, each having entrances of the U-shapes located with equal distances from the drain region, the bottoms of the U-shapes protruding toward an outer side of the planar pattern; n-type source regions in an inner side of the first concave patterns, each of the source regions contacts with the drift layer and the gate region; and n-type surge-current guiding-regions in an inner side of the second concave patterns, each of the surge-current guiding-regions contacts with the drift layer and the gate region.


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