The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Sep. 05, 2018
Applicant:

Smartsens Technology (Cayman) Co., Limited., Shanghai, CN;

Inventors:

Chen Xu, Shanghai, CN;

Yaowu Mo, Shanghai, CN;

Zexu Shao, Shanghai, CN;

Zhengmin Zhang, Shanghai, CN;

Weijian Ma, Shanghai, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/365 (2011.01); H04N 5/378 (2011.01); H04N 5/359 (2011.01); H04N 5/353 (2011.01);
U.S. Cl.
CPC ...
H04N 5/3651 (2013.01); H04N 5/3598 (2013.01); H04N 5/378 (2013.01); H04N 5/3532 (2013.01);
Abstract

A pixel cell and readout circuit includes an anti-eclipse voltage clamp circuit at both the top and bottom of each column line of an array of the pixel cells. The anti-eclipse voltage clamp circuits form a row with each column in the array coupled to an anti-eclipse voltage clamp circuit. The combination of two rows of anti-eclipse voltage clamp circuits helps settle the clamp voltage more rapidly and to compensate for the increased length of the anti-eclipse voltage circuit row as well as the column line resistance due to narrow metal lines and increased numbers of pixels as well as the requirement to operate a sensor at a higher frame rate. More significantly this circuit construction can minimize vertical shading in the resulting image.


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