The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Nov. 01, 2017
Applicant:

The Boeing Company, Chicago, IL (US);

Inventors:

Alireza Shapoury, Rancho Palos Verdes, CA (US);

Brian Kenneth Kormanyos, Edmonds, WA (US);

Assignee:

The Boeing Company, Chicago, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/193 (2006.01); H03F 3/217 (2006.01); H03F 1/02 (2006.01); H03F 1/56 (2006.01); H01Q 3/26 (2006.01); H01Q 3/28 (2006.01); H01Q 21/00 (2006.01); H01Q 5/378 (2015.01);
U.S. Cl.
CPC ...
H03F 3/193 (2013.01); H01Q 3/2658 (2013.01); H01Q 3/28 (2013.01); H01Q 5/378 (2015.01); H01Q 21/0025 (2013.01); H03F 1/0205 (2013.01); H03F 3/2171 (2013.01); H03F 3/2176 (2013.01); H03F 2200/393 (2013.01); H03F 2200/451 (2013.01);
Abstract

Adjustable load line amplifier circuits may comprise a power amplifier that has a signal input terminal to receive an input signal, a powered signal output terminal to be coupled to a load that has changing impedances, and a transistor array of transistor cells operatively coupled in parallel between the signal input terminal and the powered signal output terminal such that the transistor cells are independently configured to amplify the input signal present at the signal input terminal and effect a selected load line impedance of the transistor array that corresponds to at least one of the changing impedances of the load. The transistor array controller may be configured to effect the selected load line impedance by selectively activating one or more of the transistor cells and/or providing the transistor cells with a selectable operating voltage.


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